Hanoi University of Science and Technology

School of Electronics and Telecommunications

Viện Điện tử - Viễn thông

Vietnamese-VNEnglish (United Kingdom)

IEEE ICCE 2018

2018 IEEE Seventh International Conference on Communications and Electronics

TUYÊN SINH 2018

TS2018

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Department Electronic & Computer Eng.

Pham Nguyen Thanh Loan

 

 

 

Full name:  Dr. Pham Nguyen Thanh Loan

Work address: Room 618, Ta Quang Buu Library, No. 1 Dai Co Viet, Hai Ba   Trung, Hanoi, Vietnam

Email:   This e-mail address is being protected from spambots. You need JavaScript enabled to view it

Website:

Tell:  0983205761

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Teaching Courses

- Electronic Engineering

- Analog circuit 1

- IC Design (similar)

- Op-amp Design

Research Interests

Low-power analog IC design / use of ultra-low CMOS technology (VCO, ADC, LNA and receiver radio source energy use)

Published Papers

  1. 1.. L. Pham-Nguyen, C. Fenouillet-Beranger, T. Skotnicki, G. Ghibaudo, S. Cristoloveanu, “Direct Comparison of Si/High-k and Si/SiO2 Channels in Advanced Fully-Depleted Silcon-on-Insulator (FD SOI) MOSFETs”, IEEE Electron Device Letters, Volume 30,  Issue 10, 2009.
  2. 2.C. D. G. dos Santos, L. Pham-Nguyen S. Cristoloveanu , C. Fenouillet-Béranger ,  J. A. Martinob, “Back-Gate Influence on the Mobility Behavior in Ultrathin FD SOI Devices”, ECS Transaction-24th Symposium on Microelectronics and Devices, Volume 23, Issue 1, 2009.
  3. 3.C. Fenouillet-Beranger, L. Pham-Nguyen, P. Perreau, S. Denorme, F. Andrieu, O. Faynot, , L. Tosti, L. Brevard, C. Buj, O. Webber, C. Gallon, V. Fiori, F, Boeuf, S. Cristoloveanu, T. Skotnicki, “Ultra Compact FD SOI transistors including strain and orientation: Processing and Performance” The Electrochemical Society, Volume 19, Issue 4, pp. 55-64, 2009
  4. 4.C. Fenouillet-Beranger, S. Denorme, P. Perreau, C. Buj, O. Faynot, F. Andrieu, L. Tosti, S. Barnola, T. Salvetat, X. Garros, M. Casse, F. Allain, N. Loubet, L. Pham-Nguyen, E. Deloffre, M. Gros-Jean, R. Beneyton, C. Laviron, M. Marin, C. Leyris, S. Haendler, F. Leverd, P. Gouraud, P. Scheiblin, L. Clement, R. Pantel, S. Deleonibus, T. Skotnicki, FDSOI devices with thin BOX and ground plane integration for 32 nm node and below, Solid-State Electronics, Volume 53, Issue 7, 2009.
  5. 5.L. Pham-Nguyen, C. Fenouillet-Beranger, T. Skotnicki, G. Ghibaudo, S. Cristoloveanu, “Mobility enhancement by CESL strain in SOI MOSFETs”, Solid-State Electronics, Volume 54, Issue 2, pp. 123-130, 2010.

 

Published Books

Book Chapter:

S. Cristoloveanu, M. Bawedin, K.-I. Na, W. Van Den Daele, K.-H. Park, L. Pham-Nguyen, J. Wan, K. Tachi, S.-J. Chang and I. Ionica, et al. “A Selection of SOI Puzzles and Tentative Answers”, selected research work to be presented in “Semiconductor-On-Insulator Materials for Nanoelectronics Applications, Engineering Materials” by Nazarov et al., Part 5, 425-441, Springer-Verlag Berlin Heidelberg, 2011.                     

Current master students

  1. Nguyen The Linh
  2. Nguyen Van Lam
  3. Pham Van Danh
  4. Nguyen Huu Chong
  1. 5.Hoang Manh Quynh

Current Ph.D students

- Analog IC design team is looking for students who are passionate about this industry.

- Students will have the opportunity to learn advanced skills and increase knowledge analog IC design. In addition, in the course the students will be trained to improve the soft skills of team work, independent research, presentations, and reports in English.

- Students have many opportunities to learn Master, work and study in specialized analog IC design partner research institutes, KAIST, Korea

Other information

(If any)